This invention relates to packaging of a semiconductor device and more particularly to a method for manufacturing an encapsulated flip chip on flex film package.
The demand for a reduction in size and an increase in complexity of electronic components has driven the industry to produce smaller and more complex integrated circuits (ICs). These same trends have forced the development of IC packages having smaller footprints, higher lead counts, and better electrical and thermal performance. At the same time, these IC packages are required to meet accepted industry standards.
Ball grid array (BGA) packages were developed to meet the demand for packages having higher lead counts and smaller footprints. A BGA package is typically a square package with terminals, normally in the form of an array of solder balls, protruding from the bottom of the package. These terminals are designed to be mounted onto a plurality of pads located on the surface of a printed circuit board, or other interconnection substrate.
For many applications such as an increasing number of portable electronic components (cellular phones, disk drives, pagers, etc.) even BGA packages are too large. Consequently, solder bumps are sometimes deposited directly onto the IC chip itself and used for attachment to the circuit board (commonly referred to as direct chip attach). However, there are a number of problems associated with this approach, and it has not achieved commercial success.
Another class of packages has been developed to address many of the small size and improved performance issues. This class is referred to as chip scale packages or CSP. Chip scale packages are so called because the total package area is similar to, or not much larger than the size of the IC chip itself. Chip scale packages are similar to BGAs in that solder ball terminals are typically disposed underneath the package area. One example of a CSP is a product developed by Tessera called xe2x80x9cMICRO BGAxe2x80x9d(copyright). This product consists of a flexible circuit having leads bonded to the chip and with a soft compliant elastomer layer between the chip and the circuit.
Another CSP design, such as Texas Instruments"" Micro Star(copyright) package illustrated in FIG. 1 includes a semiconductor chip wire bonded to a flexible tape, and the assemblage overmolded using a plastic encapsulant.
As an alternate, Motorola""s SLICC and JACS-Pak devices shown in FIG. 2 include a flip chip attached to an organic substrate. Such devices provide a desired electrical performance enhancement due to the very short leads, but lack the robustness of a fully packaged device because the chip back side has no, or only minimal dielectric covering. Pick and place equipment of the end user requires a robust and somewhat standardized package form factor, such as molded plastic packages which have been familiar to the industry for many years.
A comprehensive review of CSP package designs, along with the advantages and shortcomings is given by Lau and Lee (1). John H. Lau and Shi-Wei Ricky Lee, Chip Scale Package (CSP) Design, Materials, Processes, Reliability, and Applications, McGraw-Hill, New York, 1999
From a review of the available package designs and manufacturing processes, it is obvious that the industry needs a very small outline package having the low inductance performance advantages offered by flip chip interconnection, a manufacturing technology compatible with high volume and low cost processing, and a robust, user friendly plastic molded package.
It is an object of the invention to provide a robust molded chip scale package having a chip with bumped flip chip interconnection to a flexible film substrate.
It is an object of the invention to provide a high performance, high speed, low inductance package.
It is further an object of the invention that interconnections on the substrate allow fan-in and fan-out of input/output contacts between the chip contacts and the package contacts so that the length and resistivity of interconnections is minimized.
It is an object that the package be compatible with required reliability standards, and therefore, the package is aimed primarily at small area chips.
It is an object of the invention to provide a manufacturing method amenable to assembly of multiple semiconductor devices in a continuous process flow, and having some steps performed simultaneously.
The objectives of the invention are met by providing an electronic package which includes a flexible polymer film having electronic circuitry patterned on one or both major surfaces, a bumped flip chip integrated circuit attached to the first surface, an array of solder balls to the second surface, and the device encapsulated in a plastic molding compound. An assembly and packaging method for fabrication of such integrated circuit devices wherein multiple devices are encapsulated simultaneously on a continuous polymer film, thereby providing a method compatible with high volume and low cost manufacturing, is disclosed.